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Delay Reducing Design for 2- bit Reversible Comparator Unit

International Journal of progressive Sciences and Technologies

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Title Delay Reducing Design for 2- bit Reversible Comparator Unit
Creator Anjana, A.
Subject Electronic
Comparator, Reversible logic, Reversible logic gate - M gate, Toffoli gate, MTG gate.
Logical Electronic
Description On earth, communication between any organisms is in the form of an analog signal. The manipulation of an analog signal is tedious; therefore analog to digital converter is used to convert the analog signal into digital form. Comparator plays a major role in the signal analysis. In addition to that, comparator circuit provides the efficient and high quality signal, among, the various input signals fed as an input. Magnitude comparator is a technique used to compare, the relation between given inputs in digital form that is in the form of 1’s and 0’s. Comparison between one or more input signals can be generated by using the relational operators. A comparison using conventional method is less immune to the noise; is a well-known aspect.  Taking into an account, the reversible logic gates, which has zero loss of information is used to perform the comparison of two bit input data. In this paper, a comparison is made between the two bit input data. The relative results such as A>B, A
Publisher International Journals of Sciences and High Technologies
Date 2015-12-31
Type info:eu-repo/semantics/article
Peer-reviewed Article
Format application/pdf
Source International Journal of Progressive Sciences and Technologies; Vol 1, No 2 (2015); 34-38
Language eng
Rights Copyright (c) 2016 A. Anjana